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Silicon Nanowire GAA-MOSFET: a Workhorse in Nanotechnology for Future Semiconductor Devices

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Abstract

In today’s world, semiconductor nanowire GAA-MOSFET devices have stimulated a lot of scientific research interest in the field of semiconductor. It has been observed as one of the strong and gifted structure for future generation nano-scaled devices and integrated circuits (ICs). Basically, the term nanotechnology is the key powerhouse of semiconductor device engineering and technology to produce and operate the materials at nano-meter scale (10−9 m or 1 nm) either by top-down approach where the bulk materials are converted to a group of nano particles (atoms) or by bottom-up approach where the single groups of nano particles (atoms) are converted to the bulk materials. Nanowire GAA MOSFET is considered as work horse in semiconductor industry due to great electrostatic controllability over the channel and tight coupling. This review article investigates the different structural designs of nanowire devices using nanotechnology approaches for future device applications.

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The authors confirm that the data supporting the findings of this study are available within the article, its supplementary materials or below mentioned references.

References

  1. Ermolov V, Heino M, Karkkainen A, Lehtiniemi R, Nefedov N, et al. (2007) Significance of nanotechnology for future wireless devices and communications. IEEE 18th Int Symposium on Personal, Indoor and Mobile Radio Communications, Athens 1–5

  2. Kannaparthy R, Kanaparthy A (2011) The changing face of dentistry: nanotechnology. Int J Nanomedicine 6:2799–2804

    Article  CAS  Google Scholar 

  3. Iadiz MAR, Bamedi M, Fakour SR (2017) Periodontal diseases and recently applied nanotechnology: a review article. Health 9:345–351

    Article  CAS  Google Scholar 

  4. Pease RF, Chou SY (2008) Lithography and other patterning techniques for future electronics. IEEE 96:248–270

    Article  CAS  Google Scholar 

  5. Thompson SE, Parthasarathy S (2006) Moore's law: the future of Si microelectronics. Mater Today 9:20–25

    Article  CAS  Google Scholar 

  6. Keyes RW (2001) Fundamental limits of silicon technology. IEEE 89:227–239

    Article  CAS  Google Scholar 

  7. Balzani V (2005) Nanoscience, and nanotechnology: a personal view of a chemist. Small 1:278–283

    Article  CAS  PubMed  Google Scholar 

  8. Balzani V (2008) Nanoscience, and nanotechnology: the bottom-up construction of molecular devices and machines. Pure Appl Chem 80:1631–1650

    Article  CAS  Google Scholar 

  9. Lu W, Lieber CM (2007) Nanoelectronics from the bottom up. Nat Mater 6:841–850

    Article  CAS  PubMed  Google Scholar 

  10. Gunawan O, Sekaric L, Majumdar A, Rooks M, Appenzeller J, Sleight JW (2008) et al. Nano Lett 8:1566–1571

    Article  PubMed  Google Scholar 

  11. Zervas M, Sacchetto D, Micheli GD, Leblebici Y (2011). Microelectron Eng 88:3127–3132

    CAS  Google Scholar 

  12. Westwater J, Gosain DP, Tomiya S, Usui S, Ruda H (1997). J Vac Sci Technol B15:554–557

    Article  Google Scholar 

  13. Rost J-M (2010) Nanoscience and nanotechnology in physics and chemistry. Research Perspectives of the Max Planck Society 1:40–41

    Google Scholar 

  14. Kannaparthy R, Kanaparthy A (2011) The changing face of dentistry: nanotechnology. Int J Nanomedicine 6:2799–2804

    Article  CAS  Google Scholar 

  15. Komatsu H, Ogasawara A (2005). Appl Nanotechnol Electron 16:36–45

    Google Scholar 

  16. Rae A (2005) Real life applications of nanotechnology in electronics. OnBoard Technology 36-9

  17. Dennard RH, Gaensslen FH, Yu HN, Rideout VL, Bassous E, Leblanc AR (1999) Design of ion-implanted MOSFET's with very small physical dimensions. Proc IEEE 87:668–678

    Article  Google Scholar 

  18. Khan HN, Hounshell DA, Erica RH (2018) Fuchs, science and research policy at the end of Moore’s law. Nature Electronics 1:14–21

    Article  Google Scholar 

  19. Colinge JP (2014) Multigate transistors: pushing Moor’s law to the limit, Internationalconference on Simulation of Semiconductor Processes and Devices SISPAD, IEEE, 313–316,

  20. Wu YC, Chang TC, Liu PT, Chou CW, Wu YC, Tu CH et al (2006) High-performance metal-induced lateral-crystallization Polysilicon thin-film transistors with multiple nanowire channels and multiple gates. IEEE Trans Nanotechnol 5:157–162

    Article  Google Scholar 

  21. Ishikawa F, Buyanova I (2017) Novel compound semiconductor nanowires: materials, devices, and applications. CRC Press, Boca Raton

    Book  Google Scholar 

  22. Park J-T, Colinge J-P (Dec. 2002) Multiple-gate SOI MOSFETs: device design guidelines. IEEE Transactions on Electron Devices 49(12):2222–2228

    Article  Google Scholar 

  23. Singh N, Agarwal A, Bera LK, Liow TY, Yang R, Rustagi SC, Tung CH, Kumar R, Lo GQ, Balasubramanian N, Kwong DL (2006) High-performance fully depleted silicon nanowire gate-all-around CMOS devices. IEEE Electron Device Letters 27(5):383–386. https://doi.org/10.1109/LED.2006.873381

    Article  CAS  Google Scholar 

  24. Gu JJ, Liu YQ, Wu YQ, Colby R, Gordon RG, Ye PD (2011) First experimental demonstration of gate-all-around III-V MOSFETs by top-down approach, 978-1-4577-0505, IEEE, IEDM11 pp. 769–772

  25. Assad F, Ren Z, Vasileska D et al (2000) On the performance limits for Si MOSFET’s: a theoretical study. IEEE Transactions on Electron Devices 47(1):232–240

    Article  CAS  Google Scholar 

  26. Srivastava VM, Yadav KS, Singh G (2011) Design and performance analysis of double-gate MOSFET over single-gate MOSFET for RF switch. Microelectron J 42(3):527–534

    Article  CAS  Google Scholar 

  27. Sun VM, Damrongplasit N, Shin C, Liu TJK (2011) Variation study of the planar ground-plane bulk MOSFET, SOI FinFET, and trigate bulk MOSFET designs. IEEE Trans Electron Devices 58:3294–3299

    Article  Google Scholar 

  28. Colinge P (2007) Multi-gate SOI MOSFETs. Microelectron Eng 84(9–10):2071–2076

    Article  CAS  Google Scholar 

  29. Li C, Zhuang Y, Han R (2011) Cylindrical surrounding-gate MOSFETs with electrically induced source/drain extension. Microelectron J 42:341–346

    Article  CAS  Google Scholar 

  30. Siddaiah N, Venkatesh D, Surendra PS, Vijitha N (2019) Design and modelling of high sensitivity dual gate MOSFET integrated MEMS microphone. International Journal of Innovative Technology and Exploring Engineering 8(7):393–397

    Google Scholar 

  31. Madhuri BD, Sunithamani S (2019) Design of Ternary D-latch using graphene nanoribbon field effect transistor. Proceedings - International Conference on Vision Towards Emerging Trends in Communication and Networking, ViTECoN 2019:610–614

    Google Scholar 

  32. Anil Kumar M, Sai Kiran YNS, Jagadeesh U Design and simulation of nanowire FET. Mechanics, Material Science and Engineering 9(1):211–216

  33. Ahmad Saidulu S, Sai Vineeth R, Tanmayee Y, Meenakshi B (2020) Performance measures of different gate oxide materials in gate all around FET. International Journal of Recent Technology and Engineering 9(2)

  34. Jena B, Dash S, Routray SR, Mishra GP (2019) Inner-gate-engineered GAA MOSFET to enhance the electrostatic integrity. Nano 14(9):1950128–19501-8

    Article  CAS  Google Scholar 

  35. Li M, Yeo KH, Suk SD, Yeoh YY, Kim D-W, Chung TY, Oh KS, Lee W-S (2009). Symposium VLSI technology 75:94–95

    Google Scholar 

  36. Mertens H, Ritzenthaler R, Hikavyy A, Kim M-S, Tao Z, Wostyn K, Chew SA, De Keersgieter A, Mannaert G, Rosseel E et al (2016). IEEE Symposium VLSI Technology:1–2

  37. Thomas P, Ashokbabu A, Ernest Ravindran RS, Vaish R (2019) Dielectric properties of nylon 11/CaCu3Ti4O12 (CCTO) nanocomposite films with high permittivity. IEEE Trans Dielectr Electr Insul 26(2):568–575

    Article  CAS  Google Scholar 

  38. Sridhar Yesaswi C, Srinivasu C, Hanumantha Rao Y (2019) View on transport and quantum confinement properties of nano-scale materials – applications 10(1):568–569

  39. Lieber CM (2011) Semiconductor nanowires: a platform for nanoscience and nanotechnology. MRS Bull 36:1052–1063

    Article  CAS  PubMed  PubMed Central  Google Scholar 

  40. Jena B, Dash S, Mishra GP (2016) Electrostatic performance improvement of dual material cylindrical gate MOSFET using work-function modulation technique. Superlattice Microst 97:212–220

    Article  CAS  Google Scholar 

  41. Ramakrishna BS, Jena B, Dash S, Mishra GP (2017) Investigation of electrostatic performance for a conical surrounding gate MOSFET with linearly modulated work- function. Superlattice Microst 101:152–159

    Article  CAS  Google Scholar 

  42. Naif YH (2015) A review on transistors in nano dimensions. Int J Eng Tech Sci 4:8–18

    Google Scholar 

  43. Lu W, Lieber CM (2006) Topical review: semiconductor nanowires. J Phys D Appl Phys 39:387–406

    Article  CAS  Google Scholar 

  44. Cui Y, Zhong Z, Wang D, Wang WU, Lieber CM (2003) High performance silicon nanowire field effect transistors. Nano Lett 3:149–152

    Article  CAS  Google Scholar 

  45. Lu W, **e P, Lieber CM (2008) Nanowire transistor performance limits and applications. IEEE Trans Electron Dev 55:2859–2876

    Article  CAS  Google Scholar 

  46. Zhang A, Zheng G, Lieber CM (2016) Nanowires: building blocks for Nanoscience and nanotechnology; Springer International Publishing: Switzerland, 978-3-319-41981-7

  47. Lu W, Lieber CM (2006) Semiconductor nanowires. J Phys D Appl Phys 39(21):R387–R406

    Article  CAS  Google Scholar 

  48. Lieber CM, Wang ZL (2007) Functional nanowires. MRS Bull 32(02):99–108

    Article  CAS  Google Scholar 

  49. Z. Zhong, C. Yang, C.M. Lieber (2008) Silicon nanowires and nanowire heterostructures, in Nanosilicon, ed. by V. Kumar, Elsevier, Amsterdam, pp. 176–216

  50. Garnett E, Mai L, Yang P (2019) Introduction: 1D nanomaterials/nanowires. Chem Rev 119(15):8955–8957

    Article  CAS  PubMed  Google Scholar 

  51. Jena B, Pradhan KP, Dash S, Mishra GP, Sahu PK, Mohapatra SK (2015) Performance analysis of undoped cylindrical gate all around (GAA) MOSFET at subthreshold regime. Adv Nat Sci Nanosci Nanotechnol 6:035010–035013

    Article  CAS  Google Scholar 

  52. Michaelson HB (1977) The work function of the elements and its periodicity. J Appl Phys 48:4729–4733

    Article  CAS  Google Scholar 

  53. Ren C (2006) Work function and process integration issues of metal gate materials in CMOS technology, NUS

  54. Jena B, Pradhan KP, Dash S, Mishra GP, Sahu PK, Mohapatra SK Investigation on cylindrical gate all around (GAA) to nanowire MOSFET for circuit application. Electronics and Energetics 28:637–643, 2015

  55. Pal A, Sarkar A (2014) Analytical study of dual material surrounding gate MOSFET to suppress short-channel effects (SCEs). Engineering Science and Technology, an International Journal 17:205–212

    Article  Google Scholar 

  56. Dubey S, Santra A, Saramekala G, Kumar M, Tiwari PK (2013) An analytical threshold voltage model for triple-material cylindrical gate-all-around (TM-CGAA) MOSFETs. IEEE Trans Nanotechnol 12:766–774

    Article  CAS  Google Scholar 

  57. Suveetha Dhanaselvam P, Balamurugan NB (2013) Analytical approach of a nanoscale triple-material surrounding gate (TMSG) MOSFETs for reduced short-channel effects. Microelectron J 44:400–404

    Article  Google Scholar 

  58. Sarkar A (2014) Study of RF performance of surrounding gate MOSFET with gate overlap and underlap. Adv Nat Sci Nanosci Nanotechnol 5:035006

    Article  CAS  Google Scholar 

  59. Jena B, Dash S, Mishra GP (2016) Effect of underlap length variation on DC/RF performance of dual material cylindrical MOS. International journal of numerical modelling: electronic networks, devices and fields 30:e2175

    Article  Google Scholar 

  60. Pratap Y, Ghosh P, Haldar S, Gupta RS, Gupta M (2014) An analytical subthreshold current modeling of cylindrical gate all around (CGAA) MOSFET incorporating the influence of device design engineering, 45, 408–415

  61. Sentaurus Device User Guide, Synopsys, Inc., Mountain View, USA, 2014

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Acknowledgements

The Authors would like to thank School of Electronics Engineering, Vellore Institute of Technology,Vellore, for their support to use Sentaurus TCAD simulation tool to carry out this simulation.

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KrutideepaBhol- Conceptualization, methodology, simulation and investigation,

Biswajit Jena- Writing original draft preparation,

Umakanta Nanda- reviewing and editing.

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Correspondence to Biswajit Jena.

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Bhol, K., Jena, B. & Nanda, U. Silicon Nanowire GAA-MOSFET: a Workhorse in Nanotechnology for Future Semiconductor Devices. Silicon 14, 3163–3171 (2022). https://doi.org/10.1007/s12633-021-01136-x

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