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28 GHz coupled-line-based CMOS power combiners and phase shifter, and power amplifiers with the power combiners

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Abstract

We present the design and analysis of 28 GHz CMOS power amplifiers using miniature coupled-line-based power combiners, which adopt single spiral structure with symmetrical layout to achieve miniature area and small amplitude imbalance (AI) and phase difference (PD). Coupled-line-based two power combiners and one 6-bit phase shifter (covering the 360° tuning range with excellent linearity) are designed and implemented. The first power combiner using two-turn spiral structure (combiner-1) achieves S21 of −3.93 dB and S31 of −3.97 dB at 28 GHz, corresponding to AI of 0.04 dB and PD of 0.11°. The second power combiner using three-turn spiral structure (combiner-2) achieves S21 of −3.9 dB and S31 of −3.86 dB at 28 GHz, corresponding to AI of −0.04 dB and PD of 0.02°. Three 28 GHz power amplifiers using the power combiners are designed and implemented. Excellent results are achieved. For instance, the third power amplifier (PA3) with combiner-2 comprises two ways of cascode input stage with wideband LC input matching network, followed by a common-source output stage with wideband LC inter-stage and output networks. PA3 occupies a chip area of 0.74 mm2 and achieves prominent output power (Pout) of 16.4 dBm, power gain of 22.1 dB, and power-added efficiency (PAE) of 32.6%. The eminent results of the power combiners, phase shifter, and power amplifiers indicate that they are suitable for 5G communication systems.

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Data Availability Statement

Data sharing not applicable to this article as no datasets were generated or analyzed during the current study.

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Acknowledgements

This work is supported by the MOST of Taiwan under Contracts MOST108-2221-E-260-015- MY3. The authors are grateful for the support from TSRI for chip fabrication and measurements.

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Correspondence to Yo-Sheng Lin.

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Lin, YS., Chang, JF., Lan, KS. et al. 28 GHz coupled-line-based CMOS power combiners and phase shifter, and power amplifiers with the power combiners. Analog Integr Circ Sig Process 110, 469–487 (2022). https://doi.org/10.1007/s10470-022-01994-4

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