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A 230 μW built-in on-chip auto-calibrating RF amplitude detector in 65 nm CMOS

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Abstract

In this paper, a built-in-self-calibration RF amplitude detector circuit in 65 nm CMOS is presented. The proposed architecture makes use of two detector replicas with a feedback control system to perform the self-calibration. The system is capable of detecting RF peak amplitudes range of 0–0.6 Vp with a conversion gain of − 3 V/V. The proposed system has a wide dynamic range that can auto-corrects the RF detector to less than 10% across process and temperature variations. This architecture is implemented in standard 65 nm 1P7 M CMOS process. Comprehensive silicon measurement results show that the self-calibration structure improves the detection error of the non-calibrated RF amplitude detector by a maximum of 71% at only 230 μW overall power consumption. The proposed system can be used to calibrate the variations in circuits within an RF transceiver such as LNA, Mixers, oscillators etc.

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Authors and Affiliations

  1. Khalifa Semiconductor Research Center (KSRC), Khalifa University of Science and Technology, Abu Dhabi, UAE

    Yonatan Kifle, Mohammad Alhawari & Mohammed Ismail

  2. Linkö** University, Linkö**, Sweden

    Yonatan Kifle

  3. Wayne Center for Integrated Circuits and Systems (WINCAS), Wayne State University, Detroit, USA

    Mohammad Alhawari & Mohammed Ismail

  4. SoC center, Abu Dhabi, UAE

    Hani Saleh & Baker Mohammad

  5. Intel Corporation, Phoenix, AZ, USA

    Sleiman Bou-Sleiman

Authors
  1. Yonatan Kifle
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  2. Mohammad Alhawari
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  3. Sleiman Bou-Sleiman
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  4. Hani Saleh
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  5. Baker Mohammad
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  6. Mohammed Ismail
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Correspondence to Mohammad Alhawari.

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Kifle, Y., Alhawari, M., Bou-Sleiman, S. et al. A 230 μW built-in on-chip auto-calibrating RF amplitude detector in 65 nm CMOS. Analog Integr Circ Sig Process 101, 175–185 (2019). https://doi.org/10.1007/s10470-019-01529-4

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  • DOI: https://doi.org/10.1007/s10470-019-01529-4

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