Abstract
In the recent years, flash storage devices such as solid-state drives (SSDs) and flash cards have become a popular choice for the replacement of hard disk drives, especially in the applications of mobile computing devices and consumer electronics. However, the physical constraints of flash memory pose a lifetime limitation on these storage devices. New technologies for ultra-high density flash memory such as multilevel-cell (MLC) flash further degrade flash endurance and worsen this lifetime concern. As a result, flash storage devices may experience a unexpectedly short lifespan, especially when accessing these devices with high frequencies. In order to enhance the endurance of flash storage device, various wear leveling algorithms are proposed to evenly erase blocks of the flash memory so as to prevent wearing out any block excessively. In this chapter, various existing wear leveling algorithms are investigated to point out their design issues and potential problems. Based on this investigation, two efficient wear leveling algorithms (i.e., the evenness-aware algorithm and dual-pool algorithm) are presented to solve the problems of the existing algorithms with the considerations of the limited computing power and memory space in flash storage devices. The evenness-aware algorithm maintains a bit array to keep track of the distribution of block erases to prevent any cold data from staying in any block for a long period of time. The dual-pool algorithm maintains one hot pool and one cold pool to maintain the blocks that store hot data and cold data, respectively, and the excessively erased blocks in the hot pool are exchanged with the rarely erased blocks in the cold pool to prevent any block from being erased excessively. In this chapter, a series of explanations and analyses shows that these two wear leveling algorithms could evenly distribute block erases to the whole flash memory to enhance the endurance of flash memory.
Access this chapter
Tax calculation will be finalised at checkout
Purchases are for personal use only
Similar content being viewed by others
Notes
- 1.
In this chapter, we consider NAND flash memory, which is the most widely adopted flash memory in storage-system designs.
- 2.
A logical disk is also referred to as a logical unit (i.e., LUN) [31].
- 3.
References
A. Ban, Flash file system, US Patent 5,404,485, in M-Systems, Apr 1995
A. Ban, Wear leveling of static areas in flash memory, US Patent 6732221 (2004)
A. Ban, R. Hasbaron, Wear leveling of static areas in flash memory, US Patent 6,732,221, in M-systems, May 2004
A. Ben-Aroya, S. Toledo, Competitive analysis of flash-memory algorithms, in Proceedings of the 14th Conference on Annual European Symposium (2006)
L.-P. Chang, On efficient wear-leveling for large-scale flash-memory storage systems, in 22nd ACM Symposium on Applied Computing (ACM SAC), Mar 2007
L.-P. Chang, T.-W. Kuo, Efficient management for large-scale flash-memory stroage systems with resource conservation. ACM Trans. Storage 1(4), 381–418 (2005)
L.-P. Chang, T.-W. Kuo, S.-W. Lo, Real-time garbage collection for flash-memory storage systems of real-time embedded systems. ACM Trans. Embed. Comput. Syst. 3(4), 837–863 (2004)
Y.-H. Chang, J.-W. Hsieh, T.-W. Kuo, Endurance enhancement of flash-memory storage systems: an efficient static wear leveling design, in DAC’07: Proceedings of the 44th Annual Conference on Design Automation, New York, NY, USA (ACM, 2007), pp. 212–217
M.-L. Chiang, P.C.H. Lee, R. chuan Chang, Using data clustering to improve cleaning performance for flash memory. Softw. Pract. Exp. 29(3), 267–290 (1999)
R.J. Defouw, T. Nguyen, Method and system for improving usable life of memory devices using vector processing, US Patent 7139863 (2006)
DRAM market-share games shifting from a knockout to a marathon; 4xnm process and multi-bit/cell as fundamental criteria to judge NAND Flash production competitiveness. Technical report, DRAMeXchange, Apr 2008
R.A.R.P. Estakhri, M. Assar, B. Iman, Method of and architecture for controlling system data with automatic wear leveling in a semiconductor non-volatile mass storage memory. US Patent 5835935 (1998)
Flash Cache Memory Puts Robson in the Middle. Intel
Flash-memory Translation Layer for NAND flash (NFTL). M-Systems (1998)
Freescale Semiconductor. USB Thumb Drive reference design DRM061 (2004)
FTL Logger Exchanging Data with FTL Systems. Technical report, Intel
C.J. Gonzalez, K.M. Conley, Automated wear leveling in non-volatile storage systems, US Patent 7120729 (2006)
Increasing Flash Solid State Disk Reliability. Technical report, SiliconSystems, Apr 2005
J.-U. Kang, H. Jo, J.-S. Kim, J. Lee, A superblock-based flash translation layer for NAND flash memory, in EMSOFT ’06: Proceedings of the 6th ACM and IEEE International Conference on Embedded Software, New York, NY, USA (ACM, 2006), pp. 161–170
Ken Perdue. Wear Leveling (2008)
H.-J. Kim, S.-G. Lee, An effective flash memory manager for reliable flash memory space management. IEICE Trans. Inf. Syst. 85(6), 950–964 (2002)
J. Kim, J.-M. Kim, S. Noh, S.-L. Min, Y. Cho, A Space-Efficient Flash Translation Layer for Compactflash Systems. IEEE Trans. Consum. Electron. 48(2), 366–375 (2002)
S.-W. Lee, D.-J. Park, T.-S. Chung, D.-H. Lee, S. Park, H.-J. Song, A log buffer-based flash translation layer using fully-associative sector translation. Trans. Embed. Comput. Syst. 6(3), 18 (2007)
Micron Technology. Wear-Leveling Techniques in NAND Flash Devices (2008)
Microsoft, Flash-memory abstraction layer (FAL), in Windows Embedded CE 6.0 Source Code (2007)
Motorola, Inc., MC9S12UF32 System on a Chip Guide V01.04 (2002)
M-Systems. Flash-Memory Translation Layer for NAND Flash (NFTL) (1998)
M-Systems. TrufFFS Wear-Leveling Mechanism, Technical Note TN-DOC-017 (2002)
NAND08Gx3C2A 8Gbit Multi-level NAND Flash Memory. STMicroelectronics (2005)
Numonyx, Wear Leveling in NAND Flash Memories (2008)
Open NAND Flash Interface (ONFi), Open NAND Flash Interface Specification Revision 2.1 (2009)
C. Ruemmler, J. Wilkes, UNIX disk access patterns, in Usenix Conference (Winter 1993), pp. 405–420
D. Roselli, J.R. Lorch, T.E. Anderson, A comparison of file system workloads, in Proceedings of the USENIX Annual Technical Conference, pp. 41–54
M. Rosenblum, J.K. Ousterhout, The design and implementation of a log-structured file system. ACM Trans. Comput. Syst. 10(1) (1992)
Samsung Electronics, K9F2808U0B 16M * 8 Bit NAND Flash Memory Data Sheet (2001)
Samsung Electronics Company, K9GAG08U0M 2G * 8 Bit MLC NAND Flash Memory Data Sheet (Preliminary)
Samsung Electronics Company, K9NBG08U5M 4Gb * 8 Bit NAND Flash Memory Data Sheet
SanDisk Corporation, Sandisk Flash Memory Cards Wear Leveling (2003)
D. Shmidt, Technical note: Trueffs wear-leveling mechanism (tn-doc-017). Technical report, M-System (2002)
Software Concerns of Implementing a Resident Flash Disk. Intel
Spectek, NAND Flash Memory MLC (2003)
M. Spivak, S. Toledo, Storing a persistent transactional object heap on flash memory, in LCTES ’06: Proceedings of the 2006 ACM SIGPLAN/SIGBED Conference on Language, Compilers, and Tool Support for Embedded Systems (2006), pp. 22–33
STMicroelectronics, Wear Leveling in Single Level Cell NAND Flash Memories (2006)
S. P. D.-H. L. S.-W. L. Tae-Sun Chung, Dong-Joo Park, H.-J. Song, System software for flash memory: a survey, in EUC ’06: Embedded and Ubiquitous Computing (2006), pp. 394–404
Understanding the Flash Translation Layer (FTL) Specification. Technical report, Intel Corporation (Dec 1998), http://developer.intel.com/
W. Vogels, File system usage in windows nt 4.0. SIGOPS Oper. Syst. Rev. 33(5), 93–109 (1999)
D. Woodhouse, Jffs: the journalling flash file system, in Proceedings of Ottawa Linux Symposium (2001)
M. Wu, W. Zwaenepoel, eNVy: a non-volatile main memory storage system, in Proceedings of the Sixth International Conference on Architectural Support for Programming Languages and Operating Systems (1994), pp. 86–97
Author information
Authors and Affiliations
Corresponding author
Rights and permissions
Copyright information
© 2013 Springer Science+Business Media Dordrecht
About this chapter
Cite this chapter
Chang, YH., Chang, LP. (2013). Efficient Wear Leveling in NAND Flash Memory. In: Inside Solid State Drives (SSDs). Springer Series in Advanced Microelectronics, vol 37. Springer, Dordrecht. https://doi.org/10.1007/978-94-007-5146-0_9
Download citation
DOI: https://doi.org/10.1007/978-94-007-5146-0_9
Published:
Publisher Name: Springer, Dordrecht
Print ISBN: 978-94-007-5145-3
Online ISBN: 978-94-007-5146-0
eBook Packages: EngineeringEngineering (R0)