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Power–Area-Optimized Approximate Multiplier Design for Image Fusion
In this paper, three approximate multiplier architectures are proposed: area-optimized approximate multiplier (AOM), power-optimized approximate...
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Distributed Capacitances in HV Multiplier Circuits
HV multipliers are employed for generating high voltage DC output from high frequency AC source. Cockroft Walton Voltage Multiplier (CWVM) is one...
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VLSI implementation of multiplier design using reversible logic gate
In terms of technological advancement, digital circuit design plays a vital role. Every application needs efficient designs for high-speed and...
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DTMOS based four-quadrant multiplier/divider with voltage difference transconductance amplifier
In recent years, all portable gadgets must operate at low power in order to increase battery life, increase dependability, and lower the expense of...
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Vedic Multiplier for High-Speed Applications
We live in a technologically advanced society. The use of diverse electronic gadgets is interwoven with even the most fundamental aspects of our...
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Dynamical analysis of an improved FitzHugh-Nagumo neuron model with multiplier-free implementation
The cubic-polynomial nonlinearity with N -shaped curve plays a crucial role in generating abundant electrical activities for the original...
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FPGA Implementation of Ternary Multiplier Using Reconfigurable Logic
The multiplier circuit of the ALU is one of the most crucial parts of the computer. Therefore, a powerful computer might be built by optimising the...
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A multiplier-less meminductor emulator with experimental results and neuromorphic application
This research article presents a meminductor emulator without multiplier using double output second generation current conveyor (DO-CCII) and...
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Multistage Boost Converter with Modified Voltage Multiplier for Contemporary Applications
Boost converters have wide applications in contemporary power industry, with few disadvantages like complicated design and nonlinear relationships....
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Designing of an 8 × 8 Multiplier with New Inexact 4:2 Compressors for Image Processing Applications
Inexact computing brings benefits to error-tolerant applications, including multimedia and signal processing. Although inexact computing reduces...
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Design of canonical signed digit multiplier using spurious power suppression technique adder
Reducing power consumption is a major challenge in develo** integrated processors for smart portable devices. This is particularly important for...
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A novel low-power full swing hybrid full adder-based 7:3 counter for MBW multiplier
Counter circuits play a crucial role in Modified Booth Wallace (MBW) tree multiplier architectures, serving as fundamental partial product...
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Cockcroft–Walton voltage multiplier-based argon vacuum gauge for high-temperature applications
A cost-effective argon atmosphere vacuum gauge based on direct current (DC) excited glow discharge plasma for harsh environmental conditions is...
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Low-Latency Online Multiplier with Reduced Activities and Minimized Interconnect for Inner Product Arrays
Multiplication is indispensable and is one of the core operations in many modern applications including signal processing and neural networks....
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Design and Implementation of Modified Vedic Multiplier Using Modified Decoder-Based Adder
Low power design has attracted much attention since the energy dissipation is a significant factor in digital integrated circuit design. A multiplier...
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A Novel Current Mode Approximate Multiplier Scheme Based on 4:2 and 5:2 Compressors with Low Power Consumption and High Speed in CNTFET Technology
Recent developments in multiplication circuits with fewer transistors, higher speed, and reduced energy consumption are lowering hardware costs....
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Simulation and Analysis on Stage Capacitor Bank of Symmetrical Cockroft Walton Multiplier Column for 1 MeV, 100 kW DC Accelerator
Electron Beam Centre (EBC), Beam Technology Development Group (BTDG), BARC is develo** 1 MeV, 100 kW DC accelerator for Electron Beam Waste Water...
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Error-Efficient Approximate Multiplier Design using Rounding Based Approach for Image Smoothing Application
We propose a novel, error-efficient approximate multiplier (EEAM), which is based on a rounding-based approach (RBA). Multiplication is performed...
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A High-Performance and Energy-Efficient Ternary Multiplier Using CNTFETs
Internet-of-things-based embedded systems depend on batteries as an energy resource, and thus, require energy-efficient circuits for prolonged...
