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On the Synthesis of Unate Symmetric Function Using Memristor-Based Nano-Crossbar Circuit
VLSI technology can integrate a large number of electronic components into a single chip. But as per the Moore’s prediction, this technology will...
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Design method for unbalanced ternary logic family based on binary memristors
This paper proposes a design method for unbalanced ternary logic family based on hybrid design of binary memristors and CMOS transistors, building on...
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Biomimetic olfactory chips based on large-scale monolithically integrated nanotube sensor arrays
Human olfactory sensors have a large variety of receptor cells that generate signature responses to various gaseous molecules. Ideally, artificial...
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Nonlinear stability evolution of railway wagon system due to wheel profile wear
Railway vehicle hunting instability frequently occurs due to severe operating conditions, significantly affecting trains’ running quality. This paper...
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MRAM-Based In-Memory Computing
Magneto-resistive RAM (MRAM) is an emerging non-volatile memory technology with a very wide range of potential applications. In particular,...
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Consideration of the Actual Performance in Reliability of Channel Frames
The article deals with reliability calculation of a rigid node of a steel frame of a building. Some parameters of the actual operation of the flange...
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The Roadmap of 2D Materials and Devices Toward Chips
Due to the constraints imposed by physical effects and performance degradation, silicon-based chip technology is facing certain limitations in...
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Synthesis and Technology Map** for In-Memory Computing
In this chapter, we introduce the preliminaries of in-memory computing processing-in-memory platforms, such as memristive Memory Processing Units...
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Activity-difference training of deep neural networks using memristor crossbars
Artificial neural networks have rapidly progressed in recent years, but are limited by the high energy costs required to train them on digital...
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Toward memristive in-memory computing: principles and applications
With the rapid growth of computer science and big data, the traditional von Neumann architecture suffers the aggravating data communication costs due...
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Analog In-Memory Computing with SOT-MRAM: Architecture and Circuit Challenges
Analog In-Memory Computing (AiMC) has recently emerged as a promising approach to enable the implementation of highly computation-intensive Deep...
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A Novel Reliability Assessment Scheme for Nano Resistive Random Access Memory (RRAM) Testing
To restore the traditional memories like Static RAM, Dynamic RAM and Flash memory in future computers, various semiconductor nano memories are...
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On the Reliability of Computing-in-Memory Accelerators for Deep Neural Networks
Computing-in-memory with emerging non-volatile memory (nvCiM) is shown to be a promising candidate for accelerating deep neural networks (DNNs) with...
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On-Chip DNN Training for Direct Feedback Alignment in FeFET
The current backpropagation (BP) training algorithm for deep neural networks (DNNs) requires all trainable parameters be stored in memory and used...
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Function-map** on defective nano-crossbars with enhanced reliability
Several nanoscale devices now represent viable options to replace conventional complementary metal–oxide–semiconductor (CMOS)-based designs. The...
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Echo state graph neural networks with analogue random resistive memory arrays
Recent years have witnessed a surge of interest in learning representations of graph-structured data, with applications from social networks to drug...
