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Attack and anomaly prediction in networks-on-chip of multiprocessor system-on-chip-based IoT utilizing machine learning approaches
The proliferation of multiprocessor system-on-chip (MPSoC) architectures within the Internet of Things (IoT) has introduced notable security...
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SOCA-DOM: A Mobile System-on-Chip Array System for Analyzing Big Data on the Move
Recently, analyzing big data on the move is booming. It requires that the hardware resource should be low volume, low power, light in weight,...
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Linear programming-based multi-objective floorplanning optimization for system-on-chip
In the area of very large-scale integrated circuit design, optimizing floorplans for area, wirelength, and temperature poses a daunting challenge....
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Research on Surface Defect Detection System of Chip Inductors Based on Machine Vision
Artificial inspection of surface defects in chip inductors faces issues such as low efficiency and poor accuracy. To enhance production efficiency,... -
Congestion aware low power on chip protocols with network on chip with cloud security
This article is to analyze the bottleneck problems of NoC in many more applications like multi-processor communication, computer architectures, and...
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Research progress on low-power artificial intelligence of things (AIoT) chip design
An artificial intelligence of things (AIoT) chip is a critical hardware component in edge devices that supports data acquisition and processing in...
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Simple LASER Tracking Algorithm Using Programmable System on Chip (PSoC) for Visible Light Communication (VLC)
AbstractThis paper presents a simple LASER tracking algorithm that can be used for Visible Light Communication (VLC) which is a new technology that...
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Fault-Tolerant Network-On-Chip
Manycore systems are emerging for tera-scale computation and typically utilize Network-on-Chip (NoC) as the communication fabrics between the cores.... -
HTPA: a hybrid traffic pattern aware arbitration strategy for network on chip systems
The Network-on-Chip (NoC) is a communication infrastructure designed to integrate various components of a System-on-Chip (SoC) and connect multi-core...
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Cache Memory and On-Chip Cache Architecture: A Survey
Presently, one of the most essential performance of new multicore CPUs is processing speed. Various components, including cache, are employed to... -
Device (Chip Design) Modeling
This chapter provides the principles and implementations of FPGA device (chip design) modeling. FPGA device information can be derived from the... -
A hot-module-aware map** approach in network-on-chip
In this research, a hot module location-aware heuristic map** algorithm for placement of hot modules is proposed, which aims to prevent the...
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A hybrid crossbar-ring on chip network topology for performance improvement of multicore architectures
Multicore architectures have achieved a popularity to deliver improved performance for different application domains. Performance of a system is...
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Design and implementation of Denial-of-Service attack in network of multiprocessor systems-on-chip with anomaly detection approach
IoT architecture based on the multiprocessor system-on-chip (MPSoC) is widely used because of the third-party intellectual property cores (3PIPs)...
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High-performance application map** in network-on-chip-based multicore systems
The allocation of resources and scheduling of tasks, specifically map**, in multicore systems on-chip (MCSoC), poses significant challenges. Tasks...
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Modelling and Impact Analysis of Antipode Attack in Bufferless On-Chip Networks
With advancements in VLSI technology, Tiled Chip Multicore Processors (TCMP) with packet switching Network-on-Chip (NoC) have evolved as the backbone...
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Detection and Localization of Channel-Short Faults in Regular On-Chip Interconnection Networks
With the rapid developments in VLSI technology, the communication channels in networks-on-chip (NoCs) can place many wires for sustaining...
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Cycle-accurate multi-FPGA platform for accelerated emulation of large on-chip networks
On-chip networks (NoCs) have become a popular choice for designing large multiprocessor architectures. Software-based emulation is often used to...
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Chip design with machine learning: a survey from algorithm perspective
Chip design with machine learning (ML) has been widely explored to achieve better designs, lower runtime costs, and no human-in-the-loop process....
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Detection and location of mount chip and solder joint based on machine vision
To realize the automated welding of mounted chips and solve the problems of low efficiency and poor yield rate of manual welding, the detection and...