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Hardware Acceleration
With Moore’s law and Dennard’s scaling no longer fueling the improvement in computing performance, new avenues for increasing performance are needed....
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Hardware Acceleration for SLAM in Mobile Systems
The emerging mobile robot industry has spurred a flurry of interest in solving the simultaneous localization and map** (SLAM) problem. However,...
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HILP: hardware-in-loop pruning of convolutional neural networks towards inference acceleration
Successful deployment of convolutional neural networks on resource-constrained hardware platforms is challenging for ubiquitous AI applications. For...
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Hardware acceleration of YOLOv7-tiny using high-level synthesis tools
FPGAs have emerged as a promising platform for implementing neural networks due to their reconfigurability, parallelism, and low power consumption....
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Hardware-Software Co-design for Deep Neural Network Acceleration
Deep neural networks are widely utilized in many fields. However, the extensive requirement of computation is usually difficult to meet to support...
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Hardware acceleration design of the SHA-3 for high throughput and low area on FPGA
In sensitive communications, the cryptographic hash function plays a crucial role, including in the military, healthcare, and banking, ensuring...
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Hardware acceleration for object detection using YOLOv4 algorithm on **linx Zynq platform
With the technological improvement in artificial intelligence, particularly deep learning is providing effective outcomes along with hardware...
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Multiwindow Rendering on a Cockpit Display Using Hardware Acceleration
AbstractThe modern display of a civil aircraft cockpit is based on a new interface ideology—it helps improve the perception of flight data received...
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A hardware-friendly logarithmic quantization method for CNNs and FPGA implementation
Convolutional Neural Networks (CNNs) have been widely used in various fields due to their high accuracy and efficiency. The performance of CNNs is...
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Hardware Acceleration of NTT-Based Polynomial Multiplication in CRYSTALS-Kyber
CRYSTALS-Kyber is a promising post-quantum encryption candidate and has been selected for standardization. However, its operational efficiency faces...
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Practical solutions in fully homomorphic encryption: a survey analyzing existing acceleration methods
Fully homomorphic encryption (FHE) has experienced significant development and continuous breakthroughs in theory, enabling its widespread...
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ChamelIoT: a tightly- and loosely-coupled hardware-assisted OS framework for low-end IoT devices
The evergrowing Internet of Things (IoT) ecosystem continues to impose new requirements and constraints on every device. At the edge, low-end devices...
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Efficient tasks scheduling in multicore systems integrated with hardware accelerators
Multicore systems integrated with hardware accelerators provide better performance for executing real-time applications in time-critical fields, such...
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XDP-Based SmartNIC Hardware Performance Acceleration for Next-Generation Networks
Next-generation networks are expected to combine advanced physical and digital technologies in super-high-speed connected system infrastructures,...
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FPGA-Based Hardware Accelerator for Matrix Inversion
Matrix inversion is a computationally expensive operation in many scientific applications. Performing matrix inversion of rank deficient large order...
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Acceleration of High-Dimensional Quantum Computing Simulator QuantumSkynet
This paper focuses on the acceleration of QuantumSkynet, a high-dimensional quantum computing simulator. QuantumSkynet enables operations with qudits...
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Towards High-Performance Graph Processing: From a Hardware/Software Co-Design Perspective
Graph processing has been widely used in many scenarios, from scientific computing to artificial intelligence. Graph processing exhibits irregular...
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Hardware implementation of digital pseudo-random number generators for real-time applications
This paper introduces the hardware implementation of Digital Pseudo-Random Number Generators (DPRNG) based on chaotic systems. First,...
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Programming Heterogeneous Hardware via Managed Runtime Systems
The last chapter described the challenges posed by programming hardware accelerators from managed programming languages, such as Java, C#, Python, or...
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Programming Heterogeneous Hardware via Managed Runtime Systems
This book provides an introduction to both heterogeneous execution and managed runtime environments (MREs) by discussing the current trends in...