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FPGA-based acceleration architecture for Apache Spark operators
Apache Spark has been the most popular in-memory processing framework for big data applications deployed in data centers. As a CPU-only parallel...
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A comprehensive survey of physical and logic testing techniques for Hardware Trojan detection and prevention
Hardware Trojans have emerged as a great threat to the trustability of modern electronic systems. A deployed electronic system with one or more...
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A GPU-enabled acceleration algorithm for the CAM5 cloud microphysics scheme
The National Center for Atmospheric Research released a global atmosphere model named Community Atmosphere Model version 5.0 (CAM5), which aimed to...
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NAND-SPIN-based processing-in-MRAM architecture for convolutional neural network acceleration
The performance and efficiency of running large-scale datasets on traditional computing systems exhibit critical bottlenecks due to the existing...
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Deep Quantization of Graph Neural Networks with Run-Time Hardware-Aware Training
In this paper, we investigate the benefits of hardware-aware quantization in the gFADES hardware accelerator targeting Graph Convolutional Networks...
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ControlPULP: A RISC-V On-Chip Parallel Power Controller for Many-Core HPC Processors with FPGA-Based Hardware-In-The-Loop Power and Thermal Emulation
High-performance computing (HPC) processors are nowadays integrated cyber-physical systems demanding complex and high-bandwidth closed-loop power and...
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Hardware
Android can do more than presenting a GUI on a smartphone. Android is also about wearables, talking to appropriately equipped TV sets, and...
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A dedicated hardware accelerator for real-time acceleration of YOLOv2
In recent years, dedicated hardware accelerators for the acceleration of the convolutional neural network (CNN) have been extensively studied....
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Distributed Knowledge Graph Query Acceleration Algorithm
As the era of big data continues to evolve, the scale of knowledge data that needs to be processed in reality is enormous, and the single-machine...
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FPGA-orthopoly: a hardware implementation of orthogonal polynomials
There are many algorithms based on orthogonal functions that can be applied to real-world problems. For example, many of them can be reduced to...
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An Improved GPU Acceleration Framework for Smoothed Particle Hydrodynamics
GPU has drawn much attention on accelerating SPH applications, which need high computational requirements. To eliminate the performance bottlenecks,...
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PIConGPU on Desmos Supercomputer: GPU Acceleration, Scalability and Storage Bottleneck
Particle-in-Cell models are among the most demanding computational problems that require appropriate supercomputing hardware. In this paper we...
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FPGA acceleration analysis of LibSVM predictors based on high-level synthesis
Real-time artificial intelligence is the next frontier in data analysis and processing. Support vector machines (SVM) are well-known machine learning...
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Secrecy rate analysis and power allocation strategies for control jamming-enabled STAR-RIS NOMA wireless network with non ideal hardware
This study explores the secrecy rate of a new system model comprising a control jamming-enabled simultaneous transmission and reflection...
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A Pipelined AES and SM4 Hardware Implementation for Multi-tasking Virtualized Environments
Virtualization techniques are becoming increasingly prevalent and are driving trends in hardware development to offer parallelization support for...
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Reinforcement learning methods based on GPU accelerated industrial control hardware
Reinforcement learning is a promising approach for manufacturing processes. Process knowledge can be gained automatically, and autonomous tuning of...
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Hardware Implementation of OCaml Using a Synchronous Functional Language
We present a hardware implementation of the high-level multi-paradigm language OCaml using a declarative language called Eclat. Eclat is tailored for...
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Knowledge distillation-based performance transferring for LSTM-RNN model acceleration
The sequence data processing, such as signal classification, is an important part of pattern recognition. Long short-term memory recurrent neural...
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LANA: Latency Aware Network Acceleration
We introduce latency-aware network acceleration (LANA)-an approach that builds on neural architecture search technique to accelerate neural networks....
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Scalable and Energy-Efficient NN Acceleration with GPU-ReRAM Architecture
As AI techniques are increasingly adopted in various industry sectors, reducing energy consumption in Neural Network applications has become a...