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  1. No Access

    Chapter

    Code Generation and Optimization Techniques for Embedded Digital Signal Processors

    The advent of 0.5μ processing that allows for the integration of 5 million transistors on a single integrated circuit has brought forth new challenges and opportunities in embedded-system design. This high lev...

    Stan Liao, Srinivas Devadas, Kurt Keutzer, Steve Tjiang in Hardware/Software Co-Design (1996)

  2. No Access

    Chapter

    Performance Analysis of Embedded Systems

    Embedded computer systems are characterized by the presence of one or more processors running application specific software. A large number of these systems must satisfy performance constraints in addition to ...

    Sharad Malik, Wayne Wolf, Andrew Wolfe, Yau-Tsun Li Steven in Hardware/Software Co-Design (1996)

  3. Chapter and Conference Paper

    Cinderella: A retargetable environment for performance analysis of real-time software

    Real-time systems are characterized by the presence of timing constraints that a task must be completed within a given deadline. In this paper, we present a complete environment for determining best-case and w...

    Yau-Tsun Steven Li, Sharad Malik, Andrew Wolfe in Euro-Par'97 Parallel Processing (1997)

  4. No Access

    Chapter and Conference Paper

    Solving boolean satisfiability with dynamic hardware configurations

    Boolean satisfiability (SAT) is a core computer science problem with many important commercial applications. An NP-complete problem, many different approaches for accelerating SAT either in hardware or softwar...

    Peixin Zhong, Margaret Martonosi in Field-Programmable Logic and Applications … (1998)

  5. Chapter and Conference Paper

    Exploiting Retiming in a Guided Simulation Based Validation Methodology

    There has been much interest recently in combining the strengths of formal verification techniques and simulation for functional validation of large designs [6].Typically, a formal test model is first obtained fr...

    Aarti Gupta, Pranav Ashar, Sharad Malik in Correct Hardware Design and Verification Methods (1999)

  6. No Access

    Chapter and Conference Paper

    Embedded Software Implementation Tools for Fully Programmable Application Specific Systems

    A variety of diverse pressures are sha** how we will design digital systems in the near future. Shrinking geometries into the deep submicron range raise electrical design challenges that make it impossible t...

    Sharad Malik in Embedded Software (2001)

  7. Chapter and Conference Paper

    Optimal Live Range Merge for Address Register Allocation in Embedded Programs

    The increasing demand for wireless devices running mobile applications has renewed the interest on the research of high performance low power processors that can be programmed using very compact code. One way ...

    Guilherme Ottoni, Sandro Rigo, Guido Araujo in Compiler Construction (2001)

  8. No Access

    Article

    Application of BDDs in Boolean matching techniques for formal logic combinational verification

    Verifying that an implementation of a combinational circuit meets its golden specification is an important step in the design process. As inputs and outputs can be swapped by synthesis tools or by interaction ...

    Janett Mohnke, Paul Molitor, Sharad Malik in International Journal on Software Tools fo… (2001)

  9. No Access

    Chapter and Conference Paper

    The Quest for Efficient Boolean Satisfiability Solvers

    The classical NP-complete problem of Boolean Satisfiability (SAT) has seen much interest in not just the theoretical computer science community, but also in areas where practical solutions to this problem enab...

    Lintao Zhang, Sharad Malik in Automated Deduction—CADE-18 (2002)

  10. No Access

    Chapter and Conference Paper

    Towards a Symmetric Treatment of Satisfaction and Conflicts in Quantified Boolean Formula Evaluation

    In this paper, we describe a new framework for evaluating Quantified Boolean Formulas (QBF). The new framework is based on the Davis-Putnam (DPLL) search algorithm. In existing DPLL based QBF algorithms, the p...

    Lintao Zhang, Sharad Malik in Principles and Practice of Constraint Programming - CP 2002 (2002)

  11. No Access

    Chapter and Conference Paper

    Design Tools for Application Specific Embedded Processors

    A variety of factors make it increasingly difficult and expensive to design and manufacture traditional Application Specific Integrated Circuits (ASICs). Consequently, programmable alternatives are more attrac...

    Wei Qin, Subramanian Rajagopalan, Manish Vachharajani, Hangsheng Wang in Embedded Software (2002)

  12. No Access

    Chapter

    Sat and ATPG: Algorithms for Boolean Decision Problems

    The problems of Boolean satisfiability (SAT) and automatic test pattern generation (ATPG) are strongly related — both in terms of application areas (pre-manufacturing design validation and post-manufacturing test...

    Wolfgang Kunz, João Marques-Silva, Sharad Malik in Logic Synthesis and Verification (2002)

  13. No Access

    Chapter

    Challenges in Code Generation for Embedded Processors

    The emergence of integrated circuits in which both the program-ROM and the processor are integrated on a single die initiates a new era of problems for programming language compilers. In such a micro-architect...

    Guido Araujo, Srinivas Devadas, Kurt Keutzer in Code Generation for Embedded Processors (2002)

  14. Chapter and Conference Paper

    The Quest for Efficient Boolean Satisfiability Solvers

    The classical NP-complete problem of Boolean Satisfiability (SAT) has seen much interest in not just the theoretical computer science community, but also in areas where practical solutions to this problem enab...

    Lintao Zhang, Sharad Malik in Computer Aided Verification (2002)

  15. No Access

    Chapter

    Modeling and Integration of Peripheral Devices in Embedded Systems

    This paper describes automation methods for device driver development in IP-based embedded systems in order to achieve high reliability, productivity, reusability and fast time to market. We formally specify d...

    Shaojie Wang, Sharad Malik, Reinaldo A. Bergamaschi in Embedded Software for SoC (2003)

  16. No Access

    Chapter

    Power Analysis of Embedded Software: First Step Towards Software Power Minimization

    Embedded computer systems are characterized by the presence of a dedicated processor and the software that runs on it. Power constraints are increasingly becoming the critical component of the design specifica...

    Vivek Tiwari, Sharad Malik, Andrew Wolfe in The Best of ICCAD (2003)

  17. Chapter and Conference Paper

    Symmetry Reduction in SAT-Based Model Checking

    The major challenge facing model checking is the state explosion problem. One technique to alleviate this is to apply symmetry reduction; this exploits the fact that many sequential systems consist of intercha...

    Daijue Tang, Sharad Malik, Aarti Gupta, C. Norris Ip in Computer Aided Verification (2005)

  18. No Access

    Chapter and Conference Paper

    Analysis of Search Based Algorithms for Satisfiability of Propositional and Quantified Boolean Formulas Arising from Circuit State Space Diameter Problems

    The sequential circuit state space diameter problem is an important problem in sequential verification. Bounded model checking is complete if the state space diameter of the system is known. By unrolling the t...

    Daijue Tang, Yinlei Yu, Darsh Ranjan in Theory and Applications of Satisfiability … (2005)

  19. No Access

    Chapter and Conference Paper

    Zchaff2004: An Efficient SAT Solver

    The Boolean Satisfiability Problem (SAT) is a well known NP-Complete problem. While its complexity remains a source of many interesting questions for theoretical computer scientists, the problem has found many...

    Yogesh S. Mahajan, Zhaohui Fu, Sharad Malik in Theory and Applications of Satisfiability … (2005)

  20. No Access

    Article

    Achieving Structural and Composable Modeling of Complex Systems

    This paper describes a recently released, structural and composable modeling system called the Liberty Simulation Environment (LSE). LSE automatically constructs simulators from system descriptions that closel...

    David I. August, Sharad Malik, Li-Shiuan Peh in International Journal of Parallel Programm… (2005)

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