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    Article

    Routing analog ICs using a multi-objective multi-constraint evolutionary approach

    This paper describes a new multi-objective multi-constraint routing approach integrated in LAYGEN II, an analog integrated circuit layout generator based on template descriptions and evolutionary computation t...

    R. Martins, N. Lourenço, N. Horta in Analog Integrated Circuits and Signal Processing (2014)

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    Article

    On the stability of shear flows in nematics

    A theoretical study of the effect of an applied magnetic field on the stability of the flow of nematic slabs subjected to an arbitrary shear is presented. Homeotropic boundary conditions with strong anchoring ...

    R. Martins, J. P. Casquilho in Theoretical and Computational Fluid Dynamics (2012)

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    Chapter and Conference Paper

    Low-Cost Visual Control for Handling and Assembly of Microsystems

    An environment capable of on-line visual quality and motion control is presented. The resolution of the visual system is better than 3μm. The objects are held in a flexible paletting system and need not lie on...

    M. Jakovljevic, D. Petrovic, W. Brenner, G. Popovic, E. Chatzitheodoridis in AMST ’99 (1999)

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    Chapter and Conference Paper

    Efficient Algorithms for Three-Dimensional Etching and Deposition Simulation

    The reduction of computing time without loss of accuracy is a very important task for three-dimensional process simulators. We present new approaches for fast and stable simulation of etching and deposition pr...

    W. Pyka, R. Martins in Simulation of Semiconductor Processes and Devices 1998 (1998)

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    Chapter and Conference Paper

    Accurate Layout-Based Interconnect Analysis

    We have developed a set of simulation programs for two- and three-dimensional analysis of interconnect structures. The simulators are based on the finite element method and can be used for highly accurate capa...

    R. Sabelka, R. Martins, S. Selberherr in Simulation of Semiconductor Processes and … (1998)

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    Chapter and Conference Paper

    Rigorous Capacitance Simulation of DRAM Cells

    As dynamic RAM cell size is being scaled down, the storage capacitor design becomes more difficult because its capacitance cannot scale as much. The solutions are leading to complex structures which require an...

    R. Martins, R. Sabelka, W. Pyka in Simulation of Semiconductor Processes and … (1998)