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    Dream Chip Project at ASET

    Chapter 9 introduces the results of Japanese national research and development (R&D) initiative of 3D integration technology using through-silicon via (TSV) over the 5-year period from 2008 to 2012. Associatio...

    Morihiro Kada, Harufumi Kobayashi… in Three-Dimensional Integration of Semicondu… (2015)