1 Result(s)

Chapter and Conference Paper

A 32 Gb/s Low Power Little Area Re-timer with PI Based CDR in 65 nm CMOS Technology

This paper presents a 32 Gb/s low power little area re-timer with Phase Interpolator (PI) based Clock and Data Recovery (CDR). To further ensure signal integrity, both a Continuous Time Linear Equalizer (CTLE)...

Zhengbin Pang, Fangxu Lv, Wei** Tang, Mingche Lai… in Advanced Computer Architecture (2020)