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  1. Chapter and Conference Paper

    Lazy Self-composition for Security Verification

    The secure information flow problem, which checks whether low-security outputs of a program are influenced by high-security inputs, has many applications in verifying security properties in programs. In this p...

    Weikun Yang, Yakir Vizel, Pramod Subramanyan, Aarti Gupta in Computer Aided Verification (2018)

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    Chapter and Conference Paper

    Trace-based Analysis of Memory Corruption Malware Attacks

    Understanding malware behavior is critical for cybersecurity. This is still largely done through expert manual analysis of the malware code/binary. In this work, we introduce a fully automated method for malwa...

    Zhixing Xu, Aarti Gupta, Sharad Malik in Hardware and Software: Verification and Testing (2017)

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    Chapter and Conference Paper

    Reduction of Resolution Refutations and Interpolants via Subsumption

    Propositional resolution proofs and interpolants derived from them are widely used in automated verification and circuit synthesis. There is a broad consensus that “small is beautiful”—small proofs and interpo...

    Roderick Bloem, Sharad Malik in Hardware and Software: Verification and Te… (2014)

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    Chapter and Conference Paper

    Coverage-Based Trace Signal Selection for Fault Localisation in Post-silicon Validation

    Post-silicon validation is the time-consuming process of detecting and diagnosing defects in prototype silicon. It targets electrical and functional defects that escaped detection during pre-silicon verificati...

    Charlie Shucheng Zhu, Georg Weissenbacher in Hardware and Software: Verification and Te… (2013)

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    Chapter and Conference Paper

    Modeling Firmware as Service Functions and Its Application to Test Generation

    The term firmware refers to software that is tied to a specific hardware platform, e.g., low-level drivers that physically interface with the peripherals. More recently, this has grown to include software that...

    Sunha Ahn, Sharad Malik in Hardware and Software: Verification and Testing (2013)

  6. Chapter and Conference Paper

    passert: A Tool for Debugging Parallel Programs

    passert is a new debugging tool for parallel programs which allows programmers to express correctness criteria using a simple, expressive assertion language. We demonstrate how these parallel assertions allow the...

    Daniel Schwartz-Narbonne, Feng Liu, David August in Computer Aided Verification (2012)

  7. Chapter and Conference Paper

    Wolverine: Battling Bugs with Interpolants

    Wolverine is a software verifier that checks safety properties of sequential ANSI-C and C++ programs, deploying Craig interpolation to derive program invariants. We describe the underlying approa...

    Georg Weissenbacher, Daniel Kroening in Tools and Algorithms for the Construction … (2012)

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    Chapter and Conference Paper

    Predicting Serializability Violations: SMT-Based Search vs. DPOR-Based Search

    In our recent work, we addressed the problem of detecting serializability violations in a concurrent program using predictive analysis, where we used a graph-based method to derive a predictive model from a gi...

    Arnab Sinha, Sharad Malik, Chao Wang in Hardware and Software: Verification and Te… (2012)

  9. Chapter and Conference Paper

    Symmetry Reduction in SAT-Based Model Checking

    The major challenge facing model checking is the state explosion problem. One technique to alleviate this is to apply symmetry reduction; this exploits the fact that many sequential systems consist of intercha...

    Daijue Tang, Sharad Malik, Aarti Gupta, C. Norris Ip in Computer Aided Verification (2005)

  10. Chapter and Conference Paper

    The Quest for Efficient Boolean Satisfiability Solvers

    The classical NP-complete problem of Boolean Satisfiability (SAT) has seen much interest in not just the theoretical computer science community, but also in areas where practical solutions to this problem enab...

    Lintao Zhang, Sharad Malik in Computer Aided Verification (2002)

  11. Chapter and Conference Paper

    Optimal Live Range Merge for Address Register Allocation in Embedded Programs

    The increasing demand for wireless devices running mobile applications has renewed the interest on the research of high performance low power processors that can be programmed using very compact code. One way ...

    Guilherme Ottoni, Sandro Rigo, Guido Araujo in Compiler Construction (2001)