11 Result(s)
within
Conference Paper
**anhao Xu
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Chapter and Conference Paper
A Literature Review on Smart Technologies and Logistics
The emergence of smart technologies has brought substantial changes in logistics. Hence, understanding smart technologies applied in logistics has become critical for practitioners and scholars to make smart t...
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Chapter and Conference Paper
Chinese News Data Extraction System Based on Readability Algorithm
In this era of data explosion, the number of Chinese news has increased exponentially. We need an efficient way to collect data to support the data analysis industry or to meet the data needs of artificial int...
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Chapter and Conference Paper
LUTMap: A Dynamic Heuristic Application Map** Algorithm Based on Lookup Tables
In this paper, we propose and investigate a dynamic heuristic map** algorithm with lookup table optimizations. Distributed and parallel computing are trends due to the performance requirement of modern appli...
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Chapter and Conference Paper
Cache- and Communication-aware Application Map** for Shared-cache Multicore Processors
We propose and study a map** algorithm optimized for shared-cache multicore processors. Performance requirement of modern applications is constantly growing. Processing huge amount of data in real-time is a ...
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Chapter and Conference Paper
DBFS: Dual Best-First Search Map** Algorithm for Shared-Cache Multicore Processors
This paper proposes a task map** algorithm for shared-cache multicore processors. The multicore system is quantitatively analysed in terms of intra-application communication latency, inter-application conges...
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Chapter and Conference Paper
PDNOC: An Efficient Partially Diagonal Network-on-Chip Design
With the constantly increasing of number of cores in multicore processors, more emphasis should be paid to the on-chip interconnect. Performance and power consumption of an on-chip interconnect are directly af...
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Chapter and Conference Paper
OPTNOC: An Optimized 3D Network-on-Chip Design for Fast Memory Access
The Network-on-Chip (NoC) paradigm plays an essential role in designing emerging multicore processors. Three Dimensional (3D) NoC design expands the on-chip network vertically. To achieve high performance in a...
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Chapter and Conference Paper
Study of Hierarchical N-Body Methods for Network-on-Chip Architectures
In this paper, we study two hierarchical N-Body methods for Network-on-Chip (NoC) architectures. The modern Chip Multiprocessor (CMP) designs are mainly based on the shared-bus communication architecture. As t...
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Chapter and Conference Paper
A Greedy Heuristic Approximation Scheduling Algorithm for 3D Multicore Processors
In this paper, we propose a greedy heuristic approximation scheduling algorithm for future multicore processors. It is expected that hundreds of cores will be integrated on a single chip, known as a Chip Multi...
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Chapter and Conference Paper
A Minimal Average Accessing Time Scheduler for Multicore Processors
In this paper, we study and analyze process scheduling for multicore processors. It is expected that hundreds of cores will be integrated on a single chip, known as a Chip Multiprocessor (CMP). However, operat...
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Chapter and Conference Paper
Robust Depth Camera Based Eye Localization for Human-Machine Interactions
This paper presents a novel approach to depth camera based single-/multi-person eye localization for human-machine interactions. Intensity and depth image frames of a single depth camera are used as system inp...
