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  1. Performance (Timing) Analysis

    Timing analysis can be static or dynamic. Dynamic timing analysis (DTA) verifies functionality of the design by applying input vectors and checking...
    Kaihui Tu, **fan Tang, ... Zhufei Chu in FPGA EDA
    Chapter 2024
  2. Introduction

    Field programmable gate array (FPGA) is a typical semi-custom integrated circuit. The function of an FPGA is decided by both chip vendors and end...
    Kaihui Tu, **fan Tang, ... Zhufei Chu in FPGA EDA
    Chapter 2024
  3. Semi-custom EDA

    In modern computing systems, FPGAs are used as dedicated programmable accelerators (Che et al. [1], Zhang et al. [2], Cong et al. [3])....
    Kaihui Tu, **fan Tang, ... Zhufei Chu in FPGA EDA
    Chapter 2024
  4. Introduction to Digital Twin Technologies in Transportation Infrastructure Management (TIM)

    This chapter of “Digital Twin Technologies in Transportation Infrastructure Management” provides an introduction to the concept of Digital Twin in...
    Wenjuan Wang, Qasim Zaheer, ... Wenbo Hu in Digital Twin Technologies in Transportation Infrastructure Management
    Chapter 2024
  5. Physical Implementation

    In this chapter, physical implementation step of FPGA application design will be investigated, including the well-known EDA steps: packing,...
    Kaihui Tu, **fan Tang, ... Zhufei Chu in FPGA EDA
    Chapter 2024
  6. Summary and Outlook

    In this chapter, a brief look back of vanilla FPGA EDA is summarized. Commercial FPGA EDA tools for both chip design and application design is very...
    Kaihui Tu, **fan Tang, ... Zhufei Chu in FPGA EDA
    Chapter 2024
  7. Area Analysis

    At FPGA chip design stage, area analysis/estimation is essential, just like ASIC chips. State-of-the-art FPGA area estimation techniques will be...
    Kaihui Tu, **fan Tang, ... Zhufei Chu in FPGA EDA
    Chapter 2024
  8. High-Level Synthesis

    High-level synthesis (HLS) is the process of compiling a software program into a digital circuit. This chapter provides a view into the HLS design...
    Kaihui Tu, **fan Tang, ... Zhufei Chu in FPGA EDA
    Chapter 2024
  9. Digital Twins Technologies

    This chapter of “Digital Twin Technologies in Transportation Infrastructure Management” focuses on Digital Twin technologies and their various...
    Wenjuan Wang, Qasim Zaheer, ... Wenbo Hu in Digital Twin Technologies in Transportation Infrastructure Management
    Chapter 2024
  10. Digital Twin in TIM

    This chapter of “Digital Twin Technologies in Transportation Infrastructure Management” focuses on the use of digital twin technology in TIM. The...
    Wenjuan Wang, Qasim Zaheer, ... Wenbo Hu in Digital Twin Technologies in Transportation Infrastructure Management
    Chapter 2024
  11. Bitstream Configuration

    This chapter will introduce the final step of FPGA application design EDA–bitstream configuration, including bitstream generation, compression,...
    Kaihui Tu, **fan Tang, ... Zhufei Chu in FPGA EDA
    Chapter 2024
  12. Digital Twins in Design and Construction

    Digital twins are gaining attention in the construction industry, as they offer several benefits such as reducing risks, improving quality, and...
    Wenjuan Wang, Qasim Zaheer, ... Wenbo Hu in Digital Twin Technologies in Transportation Infrastructure Management
    Chapter 2024
  13. Transportation Infrastructure Management

    This chapter of “Digital Twin Technologies in Transportation Infrastructure Management” explores Transportation Infrastructure Management (TIM) in...
    Wenjuan Wang, Qasim Zaheer, ... Wenbo Hu in Digital Twin Technologies in Transportation Infrastructure Management
    Chapter 2024
  14. Digital Twins in Operation and Maintenance(O&P)

    This chapter of “Digital Twin Technologies in Transportation Infrastructure Management” focuses on the role of Digital Twins in the operation and...
    Wenjuan Wang, Qasim Zaheer, ... Wenbo Hu in Digital Twin Technologies in Transportation Infrastructure Management
    Chapter 2024
  15. Future Digital Twin in Infrastructure Management

    In this chapter, “Future Digital Twin in Infrastructure Management,” discusses the advancements and potential future developments of digital twin...
    Wenjuan Wang, Qasim Zaheer, ... Wenbo Hu in Digital Twin Technologies in Transportation Infrastructure Management
    Chapter 2024
  16. Power Analysis

    Power dissipation has become one of the top concern in the development of new integrated circuits. In this chapter, power analysis techniques for...
    Kaihui Tu, **fan Tang, ... Zhufei Chu in FPGA EDA
    Chapter 2024
  17. Logic Synthesis

    This chapter delves into the subject of logic synthesis within the FPGA design process. It involves the conversion of high-level hardware description...
    Kaihui Tu, **fan Tang, ... Zhufei Chu in FPGA EDA
    Chapter 2024
  18. Device (Chip Design) Modeling

    This chapter provides the principles and implementations of FPGA device (chip design) modeling. FPGA device information can be derived from the...
    Kaihui Tu, **fan Tang, ... Zhufei Chu in FPGA EDA
    Chapter 2024
  19. Design (Application Design) Modeling

    Application design is the bridge between end user’s idea and FPGA’s functional units. Modeling it will build up application design data structure—the...
    Kaihui Tu, **fan Tang, ... Zhufei Chu in FPGA EDA
    Chapter 2024
  20. Prototy**: Practices and Techniques

    This chapter discusses the complex process of introducing new products to the market and the challenges involved. It highlights the importance of...
    Monica Bordegoni, Marina Carulli, Elena Spadoni in Prototy** User eXperience in eXtended Reality
    Chapter 2023
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