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Chapter and Conference Paper
A New Systolic Array for Least Significant Digit First Multiplication in GF(2 m )
This paper presents a new digit-serial systolic multiplier over GF(2 m ) for cryptographic applications. When input data come in continuously, the proposed array produces multipl...
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Chapter and Conference Paper
A Linear Systolic Array for Multiplication in GF(2 m ) for High Speed Cryptographic Processors
We present new designs of low complexity and low latency systolic arrays for multiplication in GF(2 m ) when there is an irreducible all one polynomial (AOP) of degree m. Our pro...