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  1. Design and Tool Solutions for Monolithic Three-Dimensional Integrated Circuits

    This chapter is to identify the benefits and challenges of monolithic three-dimensional integrated circuits and to introduce physical design and tool...
    Kyungwook Chang, Sung Kyu Lim in Handbook of Computer Architecture
    Living reference work entry 2024
  2. Posit for DNN Architectures

    This chapter discusses the Posit number system, which is proposed as an alternative to the floating point representation. The chapter explains how...
    Ghada Alsuhli, Vasilis Sakellariou, ... Thanos Stouraitis in Number Systems for Deep Neural Network Architectures
    Chapter 2024
  3. RNS for DNN Architectures

    Modern Deep Learning models keep growing in depth and number of parameters and require a huge amount of elementary arithmetic operations, the...
    Ghada Alsuhli, Vasilis Sakellariou, ... Thanos Stouraitis in Number Systems for Deep Neural Network Architectures
    Chapter 2024
  4. Conventional Number Systems for DNN Architectures

    The two conventional number systems, namely the floating point and fixed point, are commonly used in almost all general-purpose DNN engines. While...
    Ghada Alsuhli, Vasilis Sakellariou, ... Thanos Stouraitis in Number Systems for Deep Neural Network Architectures
    Chapter 2024
  5. Chemistry of Conductive Solutions

    This second chapter starts by introducing the chemical scenario where bio/CMOS interfaces usually work. In fact, it discusses the chemistry of...
    Chapter 2024
  6. Nanotechnology for Checking Surface Immobilization

    This chapter is the first of several chapters that address nanotechnology. In the context of this book, the use of nanotech is proposed to both...
    Chapter 2024
  7. Co-design of a Full Bio/CMOS Interface

    While this book closes with the appendixes, this chapter closes the aim of the book by giving the opportunity to see how co-design a full...
    Chapter 2024
  8. Target/Probe Interactions

    This chapter is about interactions between molecules. The main aim here is to show how biological macromolecules interact with each other or with...
    Chapter 2024
  9. Nanotechnology to Enhance Charge Transfer

    This chapter is the third chapter of this book that deals with nanotechnology. Similar to the previous chapter, nanotechnology is again proposed here...
    Chapter 2024
  10. In-Memory Computing Using FLASH Memory

    FLASH is a type of electrically erasable read-only memory (EEPROM), where the program code is usually stored. It requires high programming voltages...
    Chapter 2024
  11. MRAM-Based In-Memory Computing

    Magneto-resistive RAM (MRAM) is an emerging non-volatile memory technology with a very wide range of potential applications. In particular,...
    Vasilis Sakellariou, Thanos Stouraitis, Baker Mohammad in In-Memory Computing Hardware Accelerators for Data-Intensive Applications
    Chapter 2024
  12. Memristor-Based In-Memory Computing

    Memristor is a resistive random-access memory (RRAM) technology that enables the development of low-power and low-cost solutions. It has the...
    Meriem Bettayeb, Yasmin Halawani, ... Hani Saleh in In-Memory Computing Hardware Accelerators for Data-Intensive Applications
    Chapter 2024
  13. Preliminaries

    The previous chapter presented an introduction to the emerging reconfigurable nanotechnologies and the related challenges associated with enabling...
    Chapter 2024
  14. Physical Synthesis Flow and Liberty Generation

    Physical synthesis is a crucial step in eda to derive actual physical circuits from a technology-mapped netlist of a Boolean logic network. It brings...
    Chapter 2024
  15. Exploring Circuit Design Topologies for RFETs

    Designing logic gates based on emerging technologies is necessary as they form the building block for digital design. It lays the foundation to...
    Chapter 2024
  16. Read-Mostly Atomicity

    In Chapter  4 we considered the topic of busy-wait mutual exclusion, which achieves atomicity by allowing...
    Michael L. Scott, Trevor Brown in Shared-Memory Synchronization
    Chapter 2024
  17. Architectural Background

    The correctness and performance of synchronization algorithms depend crucially on architectural details of multicore and multiprocessor machines....
    Michael L. Scott, Trevor Brown in Shared-Memory Synchronization
    Chapter 2024
  18. Hardware–Software Co-optimization Through Design Space Exploration

    Deep learning provides a wide range of neural networks (NNs) with varying accuracy and complexity, which can be mapped to various specialized...
    Chapter 2024
  19. TinyVers: A Tiny Versatile All-Digital Heterogeneous Multi-core System-on-Chip

    Extreme edge devices or Internet of Thing nodes require energy-efficient, ultra-low power, always-on processing, and the ability to do on-demand...
    Chapter 2024
  20. Conclusion

    This chapter provides an extensive conclusion of the research work undertaken throughout this book. It identifies its main contributions to the...
    Chapter 2024
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