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Correction to: Chapter 9 in: K. P. Ray et al. (eds.), Proceedings of the 2nd International Conference on Signal and Data Processing, Lecture Notes in Electrical Engineering 1026, https://doi.org/10.1007/978-981-99-1410-4_9
The original version of the book was inadvertently published with an incorrect author’s surname “Tagloavini G” which has now been corrected to “Tagliavini G” in Reference 11. The book and the chapter have been updated with the changes.
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Soni, S., Sarkar, P., Mathew, R., Beohar, A. (2023). Correction to: Design and Implementation of 16-Bit Optimized RISC Processor with Novel Pipelining. In: Ray, K.P., Dixit, A., Adhikari, D., Mathew, R. (eds) Proceedings of the 2nd International Conference on Signal and Data Processing. CSDP 2022. Lecture Notes in Electrical Engineering, vol 1026. Springer, Singapore. https://doi.org/10.1007/978-981-99-1410-4_49
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DOI: https://doi.org/10.1007/978-981-99-1410-4_49
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Publisher Name: Springer, Singapore
Print ISBN: 978-981-99-1409-8
Online ISBN: 978-981-99-1410-4
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