Insulated Gate Field Effect Transistors, IGFETs

Abstract

The metal-oxide-semiconductor field effect transistor, MOSFET, is the most widely studied and understood IGFET, and is used here to describe key aspects of IGFET behaviour. The topic is introduced by a physical description of MOSFET operation, which identifies the linear and saturation operating regimes. A simple analytical model is developed from this, yielding expressions for important parameters such as threshold voltage, saturation voltage and carrier mobility. These are extensively used in TFT analysis. A more rigorous analysis is presented to explicitly include the role of substrate do**, and its effect upon saturation voltage. These descriptions are valid for the on-state regime, in which the gate bias, V_G, is greater than the threshold voltage, V_T. A further operating regime is described for V_G < V_T, which is referred to as the sub-threshold regime. In this regime, the current increases exponentially with gate bias, and is characterised by the sub-threshold slope. This is another concept, and parameter, which is widely used in the analysis of TFT behaviour. Finally, the role of film thickness, in thin film devices, in modifying the standard expressions for threshold voltage and saturation voltage is presented.

Appendix: Summary of Key Equations

A number of the simplified equations from the text, which can be used in basic analytical calculations, are reproduced below. The equation numbers are retained for quick reference back to the original derivations.

1.1 Simplified MOSFET On-State Analysis

Relationships between the drain current, and the gate and drain biases.

(a) drain current as a function of terminal biases

$$ I_{d} = \frac{{\mu_{n} WC_{i} }}{L}\left[ {\left( {V_{G} - V_{T} } \right)V_{D} - 0.5V_{D}^{2} } \right] $$

(3.10)

(b) threshold voltage

$$ {\text{V}}_{\text{T}} = {\text{ 2V}}_{\text{F}} + \surd \left( { 2 {\text{q}}\varepsilon_{0} \varepsilon_{\text{s}} {\text{N}}_{\text{a}} 2 {\text{V}}_{\text{F}} } \right) / {\text{C}}_{\text{i}} $$

(3.1c)

(c) linear regime current

$$ I_{d} = \frac{{\mu_{n} WC_{i} \left( {V_{G} - V_{T} } \right)\,V_{D} }}{L} $$

(3.11)

(d) linear regime mobility

$$ \mu_{n} = \frac{L}{{WC_{i} V_{D} }}\frac{{dI_{d} }}{{dV_{G} }} $$

(3.12)

(e) linear regime transconductance

$$ g_{m} \equiv \frac{{dI_{d} }}{{dV_{G} }} = \frac{{\mu_{n} WC_{i} V_{D} }}{L} $$

(3.13)

(f) saturation regime current

$$ I_{d(sat)} = \frac{{\mu_{n} WC_{i} \left( {V_{G} - V_{T} } \right)^{2} }}{2L} \equiv \frac{{\mu_{n} WC_{i} V_{{_{D(sat)} }}^{2} }}{2L} $$

(3.17)

(g) saturation regime mobility

$$ \mu_{n} = \frac{2L}{{WC_{i} }}\left( {\frac{{d\sqrt {I_{d} } }}{{dV_{G} }}} \right)^{2} $$

(3.18)

(h) saturation regime transconductance

$$ g_{m(sat)} = \frac{{\mu_{n} WC_{i} \left( {V_{G} - V_{T} } \right)^{{}} }}{L} $$

(3.19)

1.2 Simplified MOSFET Sub-Threshold Analysis

(a) sub-threshold current

$$ I_{d} \approx \frac{{q\mu_{n} W}}{L}\left( \frac{kT}{q} \right)^{2} \frac{{n_{i}^{2} }}{{N_{a} }}\sqrt {\frac{{\varepsilon_{0} \varepsilon_{s} }}{{2qN_{a} V_{s} }}} \exp \frac{{qV_{s} }}{kT} $$

(3.40)

(b) relationship between surface potential, V_s, and gate bias

$$ V_{G} = V_{s} + \frac{{\sqrt {2q\varepsilon_{0} \varepsilon_{s} N_{a} V_{s} } }}{{C_{i} }} $$

(3.41)

(c) sub-threshold slope, S

$$ S \equiv \frac{{dV_{G} }}{{d\log I_{d} }} \approx \frac{kT}{q}\left( {1 + \frac{{C_{s} }}{{C_{i} }}} \right)\ln 10 $$

(3.48)

(d) sub-threshold slope with interface states

$$ S \equiv \frac{{dV_{G} }}{{d\log I_{d} }} \approx \frac{kT}{q}\left( {1 + \frac{{C_{s} + C_{ss} }}{{C_{i} }}} \right)\ln 10 $$

(3.51)

(e) interface state capacitance

$$ C_{ss} = - \frac{{dQ_{ss} }}{{dV_{s} }}\sim qN_{ss} $$

(3.50)