Abstract
In this paper, a high-density programmable logic array based on a ternary memristor crossbar array is designed. Based on the three-valued state characteristics of the ternary memristor, we implement the ternary OR logic gate and a standard ternary inverter to demonstrate the application of this proposed crossbar by using reconfigurable and programmable connections of the memristor cells in the array. Subsequently, on the basis of these logic gates, ternary NAND gates, NOR gates, XOR gates and XNOR gates are further realized. The above-mentioned logic gates all use memristance as the logic state variable. Finally, we verified the functionality of the programmable gate array based on the proposed ternary memristor crossbar through SPICE simulation and gave the power consumption of each circuit under different input conditions. Compared with existing ternary memristor cross array circuits, our circuit has the advantages of low power consumption and high integration.
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Data availability
The datasets generated and analyzed during the current study are available from the corresponding author on reasonable request.
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Funding
This work was supported in part by the National Natural Science Foundation of China under Grant 61871429, in part by the Natural Science Foundation of Zhe-jiang Province under Grant LY18F010012. Jason K. Eshraghian acknowledges the support of the Forrest Research Fellowship awarded by the Forrest Research Foundation, Australia.
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Wang, X., Zhou, J., Dong, C. et al. A memristor crossbar based on a novel ternary memristor model. Nonlinear Dyn 112, 7583–7596 (2024). https://doi.org/10.1007/s11071-023-09159-2
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DOI: https://doi.org/10.1007/s11071-023-09159-2